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The definition of the STM32_LSE_CLOCK is given by the
drivers/clock_control/stm32_clock_control.h
to the hci/ipm_stm32wb driver
Signed-off-by: Francois Ramu <francois.ramu@st.com>

Recent versions of mypy have learned that the yaml module has type
stubs and the tool is now erroring out when it discovers we import
yaml since the stubs are not involved.

This is breaking CI on unrelated patches; fix it following the
instructions here:

https://mypy.readthedocs.io/en/stable/running_mypy.html#missing-imports

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>

Code snippet to demonstrate use of 'zephyr,user' binding
for gpio pin was missing a #define to easily get the code
compiling.
Fix this.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>

This commit adds a closing parenthesis for soc model of stm32g050.
Resolves issue #36014
Signed-off-by: Bhavesh Bhojwani <bhaavesh.bhojwaani@gmail.com>

The flash write function casts a void * to flash_prg_t, which can be 2,
4 or 8 bytes long depending on the SoC. This can trigger a hard fault
exception if data is not aligned, such as when passing a constant string
from settings_save_one().

Copying the chunk of data to a temporary variable on the stack to avoid
the problem.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>

In order to increase test coverage, this commit updates the libcxx test
to run with both full and nano variants of the newlib.

Note that C++ exception handling feature is only enabled for the newlib
full variant because the nano variant does not support C++ exception
handling.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>

Use the full version of newlib (i.e. not nano) for libcxx testing since
some features (e.g. C++ exception handling) require the full version of
newlib.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>

This commit makes C++ exception handling feature depend on the full
version of newlib (i.e. `CONFIG_NEWLIB_LIBC_NANO=n`).

The `nano.specs`, which selects the nano variant of newlib, libstdc++,
and libsupc++, does not support C++ exception handling because its
lib*c++ is compiled with `-fno-exceptions`.

For more details, refer to the issue #35972.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>

The `.eh_frame_hdr` and `.eh_frame` ROM sections, which contain read-
only C++ exception handling information, are currently specified in
`cplusplus-ram.ld`, and this can cause the linker output location
counter to take a ROM region address while in the RAM region.

This commit relocates these sections to `cplusplus-rom.ld` in order to
prevent the linker output location counter from getting corrupted.

For more details, refer to the issue #35972.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>

Readd EXTRAVERSION.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>

VERSION and conf.py updates for v2.6.0 release
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>

* Fix header for release
* Update issues before release
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>

Update API Version Modified field for things that changed
for the 2.6.0 release.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>

Update release notes for 2.6, and the vulnerabilities page to mention
CVE-2021-3581.  This CVE is under embargo until Sept 4, 2021.
Signed-off-by: David Brown <david.brown@linaro.org>

Mention the example application as a major enhancement and provide a
link to its repository.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

Mention example-application as a reference application.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

Update to the Zephyr build configuration CMake package documentation
with description on how a Zephyr build configuration CMake package can
be located outside a Zephyr workspace.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>

Fixes: #35890

The current implementation of Zephyr build configuration CMake package
only allows the build configuration package to be placed inside a
Zephyr workspace.

This commit extends the usability by allowing users to locate the
Zephyr build configuration CMake package outside the Zephyr workspace
and then refer to the package using
`-DZephyrBuildConfiguration_ROOT=<path>`
`set(ZephyrBuildConfiguration_ROOT <path>)`

This allows users greater flexibility in their workspace layouts.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>

* Added a bullet about new storage subsystem feature
* Moved disk subsystem changes into disk section
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>

The tabulator handler creates a single structure if it is handling
dynamic commands. If the currently processed dynamic command has a
dynamic subcommand they both share the same structure.
As a result tabulation operation may result in undefined behaviour.

As a solution, a new structure was introduced to keep subcommand
information.

Fixes #35926.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>

CONFIG_DEVICE_POWER_MANAGEMENT is deprecated, use CONFIG_PM_DEVICE
instead.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>

Fix incorrect and redundant use of ticker user id ULL_LOW
instead of ULL_HIGH when setting up a connection using a
mayfly to disable LLL context. Also, the LLL context pointer
is invalid, where node rx is passed instead of LLL context.

Use the ULL disabled callback when done event has not yet
been processed, or a direct connection setup in ULL_HIGH
context when ULL is already disabled (reference count is
zero) is sufficient.

Regression introduced in commit 30f260df

 ("Bluetooth:
controller: Fix adv/scan context access post release").
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>

The caller saved registers were restored both as caller saved and
callee saved registers, i.e. register 0-15 were restored into
both register 0-15 and 15-31.
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>

Fixes #35916.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>

Update segger module version to revision that re-introduces zephyr
Kconfig options
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>

Shell log backend depends on logging being enabled. Lack of this
dependency leads to compilation failure when logging is disabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>

For some reason a few drivers were not converted to the new device PM
callback signature. The reason may be because the device PM part is
compiled only when CONFIG_PM_DEVICE=y, a condition not enabled in CI by
default.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

The data-sjw value was incorrectly written to the NBTP register when it
should be written to the DBTP register.

This fixes a regression introduced by
5e0ca9b4

.
Signed-off-by: Christoph Steiger <c.steiger@lemonage.de>

Check the length field of the scan response data.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>

Updates the frdm_k64f board documentation to clarify that the J-Link
OpenSDA firmware version depends on the DAPLink bootloader version.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>

Call the root node 'root', otherwise we end up with two nodes with the
same identifier ':'.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>

This board got forgotten when we migrated the older APIC_TIMER users.
Now the platform is SMP by default and the older driver refuses to
build.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

ACRN build and configuration is non-trivially complicated, and so far
integration documentation has been mostly missing, and users have had
to get by via copying from existing integration efforts with minor
changes, leading to repeated mistakes and persistent confusion.  This
is an attempt to document the process from first principles, with an
eye toward informing integrators (not me!) who might come by later to
better automate things.  Some of the content is going to look remedial
to someone already familiar with e.g. ACRN configuration or EFI boot.

This simply replaces the pre-existing docs, which were for earlier
versions of ACRN where Zephyr was launched from the service OS instead
of the now-standard pre-launch VM mode.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

SMP is working now, make a 2-cpu configuration default for this
device.

Note that this requires changes to the default ACRN build
configuration!  In hybrid.xml, you need to specify multiple physical
CPUs for the VM to uses, e.g.:

    <vm id="0">
        ...
        <cpu_affinity>
            <pcpu_id>0</pcpu_id>
            <pcpu_id>1</pcpu_id>
        </cpu_affinity>
    </vm>

Failing to build with this change will result in the system hanging at
boot trying to start up a CPU that won't run.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

The ACRN hypervisor uses 0, 2, 4, 6 as its local APIC IDs for
virtualized CPUs and not the 0, 1, 2, 3 defaults we have.

(I hate this feature, having to manually (!) probe and code these
things in C isn't scaling.  Zephyr needs to do the probing on its own
somehow, even if it's an offline tool in Linux or something.)
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

The 16 bit bootstrap code for SMP CPUs was using the 286-era "lmsw"
instruction (load machine status word) to set the protected bit in CR0
(which is the modern evolution of the same register), presumably
because this is 16 bit code and we can't move a dword into CR0.

But that's wrong, because the full instruction set *is* available in
real mode on a 386, you just have to use a operand size prefix to get
to it, which the assembler emits for you automatically when you use
the .code16 directive.

Write this conventionally and use modern (e.g. 1986-era) instructions.
It also has the advantage of not confusing much more modern
hypervisors like ACRN by issuing instructions they (and I!) never knew
existed.

Fixes #35076
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

Because of a historical misunderstanding, by default the ACRN
hypervisor wants to load Zephyr at address 0x1000 and enter the binary
at that same address.  This entry point corresponds to the __start
symbol of the build they were given, which is a 1-cpu non-SMP
configuration.  Unfortunately, when we build with
CONFIG_MP_NUM_CPUS=1, the code in locore.S #if's out the 16 bit entry
point for the auxiliary CPUs at the start of the section.  So in the
build ACRN received, the start address happened to be 0x7000, the same
address we need to launch the AP processors from.

That's right: under ACRN, the SAME ADDRESS used to enter the OS in 32
bit mode needs to be used later to boot CPUs running in 16 bit real
mode!

The solution, such as it is, is to put a 32 bit jump at the entry
address which hops to the 32 bit OS entry code, and then scribble NOP
instructions over that jump once we get there so that the next time we
reach that address (in real mode) we fall through to the correct
entry.

This patch should be considered a temporary workaround.  While it
works on all x86 hardware, it's not really needed.  A much better
solution would be to eliminate the locore linker region entirely
(which causes other headaches) and enter the Zephyr binary in a 32 bit
address somewhere in the contiguous high memory area.  All that locore
is needed for is the 16 bit bootstrap code for SMP processors, which
is ~6 instructions and can be copied in from the kernel at runtime.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

The final else {} in the if...else if is missing required
comment (non-empty, ';' is not sufficient). This adds a comment
to comply with CG 15.7.
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>

The final else {} in the if...else if is missing required
comment (non-empty, ';' is not sufficient). This adds a comment
to comply with CG 15.7.
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>

The NXP I2S driver queues 2 receive buffers to avoid receive overflows.
Allocate an extra block so we do not see test failures due to allocate
failures
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>