CONFIG_NANO_TIMERS=y
CONFIG_NANO_TIMEOUTS=y
CONFIG_X86=y
CONFIG_SOC_QUARK_X1000=y
CONFIG_BOARD_GALILEO=y
CONFIG_CPU_MINUTEIA=y
CONFIG_PCI_LEGACY_BRIDGE=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_IRQ_LEVEL_LOW=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_HPET_TIMER_LEVEL_LOW=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
CONFIG_GPIO=y
CONFIG_GPIO_DW_0_IRQ_SHARED=y
CONFIG_I2C=y
CONFIG_I2C_DW=y
CONFIG_I2C_DW_0=y
CONFIG_I2C_DW_0_IRQ_SHARED=y
CONFIG_GPIO_PCAL9535A=y
CONFIG_GPIO_SCH=y
CONFIG_GPIO_SCH_LEGACY_IO_PORTS_ACCESS=y
CONFIG_GPIO_SCH_0=y
CONFIG_GPIO_SCH_1=y
CONFIG_I2C_DW_IRQ_LEVEL_LOW=y
CONFIG_SHARED_IRQ=y
CONFIG_SHARED_IRQ_0_LEVEL_LOW=y
CONFIG_SPI_INTEL_LEVEL_LOW=y-
Anas Nashif authored
Change terminology and use SoC instead of platform. An SoC provides features and default configurations available with an SoC. A board implements the SoC and adds more features and IP block specific to the board to extend the SoC functionality such as sensors and debugging features. Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f Signed-off-by:Anas Nashif <anas.nashif@intel.com>
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